數(shù)字式頻率合成器設(shè)計

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摘 要
隨著雷達、通信系統(tǒng)的快速發(fā)展，對其核心部分—頻率合成器的要求也越來越高。但對于現(xiàn)在大部分的頻率合成器而言，性能和成本卻往往是一對矛盾，為了能在保證精度的基礎(chǔ)上有效降低成本。論文擬采用單片機控制技術(shù)來設(shè)計一款高性能直接數(shù)字式頻率合成器（DDS）。
論文選用AT89C51單片機作為整個DDS系統(tǒng)的控制核心，AT89C51采用CMOS技術(shù)，內(nèi)置4KB的Flash存儲器，其價格低廉且擁有良好的控制性能，適用于論文DDS系統(tǒng)電路設(shè)計的要求。為了實現(xiàn)整體系統(tǒng)的優(yōu)化配置，為核心控制器匹配AD9852芯片作為頻率合成單元以提高性能。此外，還設(shè)計了電平轉(zhuǎn)換電路、放大電路和濾波電路等輔助電路，且通過程序的設(shè)計與優(yōu)化，能夠?qū)崿F(xiàn)輸出頻率范圍100Hz~10MHz，步進100Hz的優(yōu)越正弦信號。
根據(jù)所設(shè)計的電路及程序結(jié)構(gòu)，結(jié)合現(xiàn)有實驗條件，論文采用MATLAB軟件，對頻率控制與合成兩大模塊建立綜合仿真模型，仿真結(jié)果表明步進頻率達到設(shè)計要求，輸出頻率誤差相比主流AD5930芯片技術(shù)減少約5.6%。該項研究為低成本高精度的直接數(shù)字式頻率合成器設(shè)計提供了理論和實驗指導(dǎo)。

關(guān)鍵詞: 單片機，頻率合成器，頻率控制字，電路匹配

DESIGN OF DIRECT DIGITAL FREQUENCY SYNTHESIZER BASED ON SCM
Abstract
With the rapid development of radar, communication systems, its core part—frequency synthesizer’s requirements are also increasing. But for most of the current frequency synthesizer, the performance and cost is often a contradiction, in order to reduce the cost basis to ensure accuracy. MCU control technology is adopted to design a high—performance direct digital frequency synthesizer (DDS).
Papers selected AT89C51 microcontroller as the core of the DDS control system. AT89C51 uses CMOS technology and built 4KB of Flash memory. It is inexpensive and has good control performance for papers DDS system circuit design. In order to achieve the optimal allocation of the overall system, the AD9852 chip as the frequency synthesizer unit is matched for microcontroller to improve performance. In addition, the design of the level conversion circuit, amplifier circuit, filter circuit and other auxiliary circuits, and through the design and optimization process, achieves an output frequency range of 100Hz~10MHz, stepping excellent sinusoidal signal of 100Hz.
According to circuit design and program structure, combined with the existing experimental conditions, the paper uses MATLAB software to establish a comprehensive simulation model for the frequency control and synthesis of the two module. Simulation results show that both the step frequency to meet the design requirements. Compared to the mainstream AD5930 chip technology, frequency stability decreases appro -ximately 5.6%. The study is a low-cost high-precision direct digital frequency synthesizer designed to provide a theoretical foundation and experimental guidance.


Keywords: Single-chip microcontroller, Frequency synthesizer, Frequency control word, Matching circuit

目 錄
第一章 緒論 1
1.1直接數(shù)字式頻率合成器的研究意義 1
1.2直接數(shù)字式頻率合成器的發(fā)展 2
1.3直接數(shù)字式頻率合成器的國內(nèi)外現(xiàn)狀 4
1.4 論文的設(shè)計思路和技術(shù)指標 7
第二章 基于單片機的DDS的總體設(shè)計思想和方法 10
2.1 DDS基本原理 10
2.2 DDS基本框架 11
2.2.1硬件設(shè)計框架 11
2.2.2軟件設(shè)計框架 12
2.3 DDS總體設(shè)計 14
第三章 DDS的硬件電路 16
3.1 控制電路 16
3.1.1 單片機選型 16
3.1.2 AT89C51外圍電路 17
3.2 頻率合成電路 18
3.2.1面向單片機的DDS芯片選型 18
3.2.2 AD9852內(nèi)部電路 19
3.2.3 AD9852外圍電路 21
3.3 輔助電路 22
3.3.1 電平轉(zhuǎn)換電路 22
3.3.2 放大電路 23
3.3.3 濾波電路 24
3.4 總體電路 24
第四章 DDS軟件設(shè)計 26
4.1 參數(shù)設(shè)置程序 26
4.2 FCW計算程序 26
4.3 頻率微調(diào)控制程序 27
第五章 系統(tǒng)仿真與噪聲分析 28
5.1 系統(tǒng)仿真 28
5.1.1 DDS仿真輸出波形 30
5.1.2頻率影響因素調(diào)試 31
5.2 一些抗干擾措施和改進建議 33
第六章 總結(jié) 35
致 謝 36
參考文獻 37