畢業(yè)論文 函數(shù)信號(hào)發(fā)生器的fpga設(shè)計(jì).doc
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畢業(yè)論文 函數(shù)信號(hào)發(fā)生器的fpga設(shè)計(jì),目錄摘要iabstractii1 引言- 1 -1.1 編寫函數(shù)信號(hào)發(fā)生器的目的及意義- 1 -1.2本設(shè)計(jì)的主要內(nèi)容- 2 -2 fpga概述- 3 -2.1 fpga技術(shù)的發(fā)展歷程和動(dòng)向- 3 -2.2 fpga的設(shè)計(jì)方法- 3 -2.3 fpga的設(shè)計(jì)流程- 4 -2.3.1 基于“自頂向下”設(shè)計(jì)方法的fpga設(shè)...
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目錄
摘要 I
Abstract II
1 引言 - 1 -
1.1 編寫函數(shù)信號(hào)發(fā)生器的目的及意義 - 1 -
1.2本設(shè)計(jì)的主要內(nèi)容 - 2 -
2 FPGA概述 - 3 -
2.1 FPGA技術(shù)的發(fā)展歷程和動(dòng)向 - 3 -
2.2 FPGA的設(shè)計(jì)方法 - 3 -
2.3 FPGA的設(shè)計(jì)流程 - 4 -
2.3.1 基于“自頂向下”設(shè)計(jì)方法的FPGA設(shè)計(jì)流程 - 4 -
2.3.2 基于“自頂向下”設(shè)計(jì)流程的優(yōu)點(diǎn) - 5 -
2.4 VHDL硬件描述語(yǔ)言介紹 - 5 -
2.4.1 VHDL語(yǔ)言的發(fā)展歷史 - 5 -
2.4.2 VHDL語(yǔ)言的特點(diǎn) - 6 -
2.4.3 VHDL語(yǔ)言的開發(fā)流程 - 7 -
2.4.4 VHDL語(yǔ)言設(shè)計(jì)總結(jié) - 7 -
2.5 Quartus II軟件介紹 - 9 -
2.5.1 Quartus II 概述 - 9 -
2.5.2 Quartus II的設(shè)計(jì)流程 - 10 -
2.5.3 Quartus II設(shè)計(jì)方法 - 10 -
3 函數(shù)信號(hào)發(fā)生器的FPGA設(shè)計(jì) - 12 -
3.1 三角波信號(hào)發(fā)生器的設(shè)計(jì) - 12 -
3.1.1 三角波的VHDL描述 - 12 -
3.1.2 三角波信號(hào)發(fā)生器的邏輯電路圖 - 13 -
3.2 正弦波信號(hào)發(fā)生器的設(shè)計(jì) - 14 -
3.2.1 正弦波的VHDL描述 - 14 -
3.2.2 正弦波信號(hào)發(fā)生器的邏輯電路圖 - 17 -
3.3 方波信號(hào)發(fā)生器的設(shè)計(jì) - 18 -
3.3.1 方波的VHDL描述 - 18 -
3.3.2 方波信號(hào)發(fā)生器的邏輯電路圖 - 20 -
3.4 波形選擇模塊的設(shè)計(jì) - 20 -
3.4.1 波形選擇模塊的VHDL描述 - 20 -
3.4.2 波形選擇模塊的邏輯電路圖 - 22 -
3.5 頂層模塊的設(shè)計(jì) - 22 -
3.5.1 頂層模塊的VHDL描述 - 22 -
3.5.2 頂層模塊的邏輯電路圖 - 24 -
4 函數(shù)信號(hào)發(fā)生器的仿真結(jié)果及分析 - 25 -
4.1 三角波信號(hào)發(fā)生器的仿真結(jié)果及分析 - 25 -
4.2 正弦波信號(hào)發(fā)生器的仿真結(jié)果及分析 - 26 -
4.3 方波信號(hào)發(fā)生器的仿真結(jié)果及分析 - 26 -
5 結(jié)束語(yǔ) - 27 -
5.1 總結(jié) - 27 -
5.2 下一步展望 - 27 -
參考文獻(xiàn) - 28 -
致 謝 - 29 -
摘要
函數(shù)信號(hào)發(fā)生器是各種測(cè)試和實(shí)驗(yàn)過程中不可缺少的工具,在通信、測(cè)量、雷達(dá)、控制、教學(xué)等領(lǐng)域應(yīng)用十分廣泛。在科技飛速發(fā)展的今天,F(xiàn)PGA在函數(shù)信號(hào)發(fā)生器的領(lǐng)域的應(yīng)用已經(jīng)非常普遍。隨著我國(guó)經(jīng)濟(jì)和科技的發(fā)展,對(duì)相應(yīng)的測(cè)試儀器和測(cè)試手段也提出了更高的要求,信號(hào)發(fā)生器己成為測(cè)試儀器中至關(guān)重要的一類,因此開發(fā)信號(hào)發(fā)生器具有重大意義。
函數(shù)信號(hào)發(fā)生器能夠產(chǎn)生正弦波、方波、三角波等等各波形信號(hào),還能夠?qū)⑵渲腥我鈨煞N信號(hào)或三種信號(hào)疊加產(chǎn)生疊加波形。波形頻率可以調(diào)節(jié),通過撥碼開關(guān)可以選擇波形以不同頻率輸出。輸出的波形信息是8位二進(jìn)制數(shù)字量,可通過D/A期間轉(zhuǎn)換為模擬量后進(jìn)行放大輸出。
設(shè)計(jì)通過硬件描述語(yǔ)言VHDL來實(shí)現(xiàn),并使用 Altera的QuartusII軟件進(jìn)行編譯、調(diào)試與仿真,驗(yàn)證了函數(shù)信號(hào)發(fā)生器完全可以實(shí)現(xiàn)預(yù)定的功能。
關(guān)鍵詞:函數(shù)信號(hào)發(fā)生器;FPGA;VHDL;Quartus II軟件
Abstract
Function signal generator is the most essential tool in all kinds of test and experiment. It is very widely used in communications, measuring, radar, control, teaching etc .In the days of rapid development of science and technology, FPGA has been preva lently applied in the field of function signal generator . Along with the fast development of economy and science in our country, the corresponding testing instrument and test method entail higher speed and quality, signal generator has become a vital category , thus developing signal generator is of great significance.
Function signal generator can generate sine wave, triangular, square, etc. various waveform signal, including superposition waveform produced by any two or three kinds of signals. Because wave frequency is adjustable so dial through code switch it can output different frequency waveform . The output waveform information is 8 binary Numbers,also it can be transformed to analog through the D/A to be amplified and then output.
The design is accomplished by the VHDL hardware description language and use QuartusII software for compile, debug and simulation. It is verified to prove that the function signal generator can achieve predetermined function.
Key words: Function signal generator; FPGA;VHDL; QuartusII software.
摘要 I
Abstract II
1 引言 - 1 -
1.1 編寫函數(shù)信號(hào)發(fā)生器的目的及意義 - 1 -
1.2本設(shè)計(jì)的主要內(nèi)容 - 2 -
2 FPGA概述 - 3 -
2.1 FPGA技術(shù)的發(fā)展歷程和動(dòng)向 - 3 -
2.2 FPGA的設(shè)計(jì)方法 - 3 -
2.3 FPGA的設(shè)計(jì)流程 - 4 -
2.3.1 基于“自頂向下”設(shè)計(jì)方法的FPGA設(shè)計(jì)流程 - 4 -
2.3.2 基于“自頂向下”設(shè)計(jì)流程的優(yōu)點(diǎn) - 5 -
2.4 VHDL硬件描述語(yǔ)言介紹 - 5 -
2.4.1 VHDL語(yǔ)言的發(fā)展歷史 - 5 -
2.4.2 VHDL語(yǔ)言的特點(diǎn) - 6 -
2.4.3 VHDL語(yǔ)言的開發(fā)流程 - 7 -
2.4.4 VHDL語(yǔ)言設(shè)計(jì)總結(jié) - 7 -
2.5 Quartus II軟件介紹 - 9 -
2.5.1 Quartus II 概述 - 9 -
2.5.2 Quartus II的設(shè)計(jì)流程 - 10 -
2.5.3 Quartus II設(shè)計(jì)方法 - 10 -
3 函數(shù)信號(hào)發(fā)生器的FPGA設(shè)計(jì) - 12 -
3.1 三角波信號(hào)發(fā)生器的設(shè)計(jì) - 12 -
3.1.1 三角波的VHDL描述 - 12 -
3.1.2 三角波信號(hào)發(fā)生器的邏輯電路圖 - 13 -
3.2 正弦波信號(hào)發(fā)生器的設(shè)計(jì) - 14 -
3.2.1 正弦波的VHDL描述 - 14 -
3.2.2 正弦波信號(hào)發(fā)生器的邏輯電路圖 - 17 -
3.3 方波信號(hào)發(fā)生器的設(shè)計(jì) - 18 -
3.3.1 方波的VHDL描述 - 18 -
3.3.2 方波信號(hào)發(fā)生器的邏輯電路圖 - 20 -
3.4 波形選擇模塊的設(shè)計(jì) - 20 -
3.4.1 波形選擇模塊的VHDL描述 - 20 -
3.4.2 波形選擇模塊的邏輯電路圖 - 22 -
3.5 頂層模塊的設(shè)計(jì) - 22 -
3.5.1 頂層模塊的VHDL描述 - 22 -
3.5.2 頂層模塊的邏輯電路圖 - 24 -
4 函數(shù)信號(hào)發(fā)生器的仿真結(jié)果及分析 - 25 -
4.1 三角波信號(hào)發(fā)生器的仿真結(jié)果及分析 - 25 -
4.2 正弦波信號(hào)發(fā)生器的仿真結(jié)果及分析 - 26 -
4.3 方波信號(hào)發(fā)生器的仿真結(jié)果及分析 - 26 -
5 結(jié)束語(yǔ) - 27 -
5.1 總結(jié) - 27 -
5.2 下一步展望 - 27 -
參考文獻(xiàn) - 28 -
致 謝 - 29 -
摘要
函數(shù)信號(hào)發(fā)生器是各種測(cè)試和實(shí)驗(yàn)過程中不可缺少的工具,在通信、測(cè)量、雷達(dá)、控制、教學(xué)等領(lǐng)域應(yīng)用十分廣泛。在科技飛速發(fā)展的今天,F(xiàn)PGA在函數(shù)信號(hào)發(fā)生器的領(lǐng)域的應(yīng)用已經(jīng)非常普遍。隨著我國(guó)經(jīng)濟(jì)和科技的發(fā)展,對(duì)相應(yīng)的測(cè)試儀器和測(cè)試手段也提出了更高的要求,信號(hào)發(fā)生器己成為測(cè)試儀器中至關(guān)重要的一類,因此開發(fā)信號(hào)發(fā)生器具有重大意義。
函數(shù)信號(hào)發(fā)生器能夠產(chǎn)生正弦波、方波、三角波等等各波形信號(hào),還能夠?qū)⑵渲腥我鈨煞N信號(hào)或三種信號(hào)疊加產(chǎn)生疊加波形。波形頻率可以調(diào)節(jié),通過撥碼開關(guān)可以選擇波形以不同頻率輸出。輸出的波形信息是8位二進(jìn)制數(shù)字量,可通過D/A期間轉(zhuǎn)換為模擬量后進(jìn)行放大輸出。
設(shè)計(jì)通過硬件描述語(yǔ)言VHDL來實(shí)現(xiàn),并使用 Altera的QuartusII軟件進(jìn)行編譯、調(diào)試與仿真,驗(yàn)證了函數(shù)信號(hào)發(fā)生器完全可以實(shí)現(xiàn)預(yù)定的功能。
關(guān)鍵詞:函數(shù)信號(hào)發(fā)生器;FPGA;VHDL;Quartus II軟件
Abstract
Function signal generator is the most essential tool in all kinds of test and experiment. It is very widely used in communications, measuring, radar, control, teaching etc .In the days of rapid development of science and technology, FPGA has been preva lently applied in the field of function signal generator . Along with the fast development of economy and science in our country, the corresponding testing instrument and test method entail higher speed and quality, signal generator has become a vital category , thus developing signal generator is of great significance.
Function signal generator can generate sine wave, triangular, square, etc. various waveform signal, including superposition waveform produced by any two or three kinds of signals. Because wave frequency is adjustable so dial through code switch it can output different frequency waveform . The output waveform information is 8 binary Numbers,also it can be transformed to analog through the D/A to be amplified and then output.
The design is accomplished by the VHDL hardware description language and use QuartusII software for compile, debug and simulation. It is verified to prove that the function signal generator can achieve predetermined function.
Key words: Function signal generator; FPGA;VHDL; QuartusII software.