基于VHDL數(shù)字頻率計(jì)的設(shè)計(jì)與仿真

目錄
1 緒論 1
1.1 課題簡(jiǎn)介 1
1.2 課題研究背景 2
1.3 課題設(shè)計(jì)意義和目的 3
2 數(shù)字頻率計(jì)的綜合設(shè)計(jì) 5
2.1 設(shè)計(jì)原理 5
2.2 設(shè)計(jì)功能 5
2.3 設(shè)計(jì)思路 6
3 利用VHDL語言設(shè)計(jì)頻率計(jì) 8
3.1 VHDL語言介紹 8
3.2 頻率計(jì)的設(shè)計(jì)程序 9
4 數(shù)字頻率計(jì)的仿真及波形分析 15
4.1 MAX+PLUS II軟件簡(jiǎn)介 15
4.2 MAX+plus II的文本輸入設(shè)計(jì)方法 16
4.3 系統(tǒng)設(shè)計(jì)仿真及波形分析 25
5 小結(jié) 32
致謝 33
附錄：頻率計(jì)源程序及模塊圖 34
參考文獻(xiàn) 41

摘要：數(shù)字頻率計(jì)是數(shù)字電路中的一個(gè)典型應(yīng)用，實(shí)際的硬件設(shè)計(jì)用到的器件較多，連線比較復(fù)雜，而且會(huì)產(chǎn)生比較大的延時(shí)，造成測(cè)量誤差、可靠性差。本課題介紹一種運(yùn)用MAX+PLUSⅡ軟件基于VHDL的采用自頂而下 (up to bottom ) 設(shè)計(jì)方法實(shí)現(xiàn)的數(shù)字頻率計(jì)。根據(jù)頻率計(jì)的基本原理, 運(yùn)用自頂向下的設(shè)計(jì)思想,編程時(shí)分別對(duì)控制、計(jì)數(shù)、鎖存、譯碼等電路模塊進(jìn)行VHDL文本描述 ,使每個(gè)電路模塊以及器件都以文本的形式出現(xiàn) ,然后通過編譯、波形分析、仿真、調(diào)試來完善每個(gè)器件的功能。單個(gè)器件制作完成后 ,將它們生成庫(kù)文件 ,并產(chǎn)生相應(yīng)的符號(hào),最后用語言將各個(gè)已生成庫(kù)文件的器件的各個(gè)端口連接在一起 ,從而形成了系統(tǒng)主電路的軟件結(jié)構(gòu)。該設(shè)計(jì)方法與傳統(tǒng)的設(shè)計(jì)方法相比,具有外圍電路簡(jiǎn)單,程序修改靈活和調(diào)試容易等特點(diǎn),實(shí)現(xiàn)數(shù)字系統(tǒng)硬件的軟件化。
關(guān)鍵字：VHDL;頻率計(jì); MAX+PLUSⅡ
中圖分類號(hào)：TP312

 
Digital frequency meter based on VHDL Design and Simulation

Abstract: Digital frequency meter is a digital circuit in a typical application, the actual hardware design of devices used in more complicated connection, but will have larger delay, caused by measurement error, poor reliability. This issue introduces a use of MAX + PLUS Ⅱ software is based on the use of VHDL top-down (up to bottom) design method to achieve the digital frequency meter. According to the basic principle of frequency meter, using top-down design, and programming the control, respectively, counting, latch, decoder circuit modules such as VHDL text description, so that each circuit module and the device is in text form , and then compile, waveform analysis, simulation, debugging to improve the function of each device. Produced a single device, will they generate library files, and generates a corresponding symbol, the final language will have generated libraries of various devices connected to each port, the main circuit to form the system software structure. The design method and the traditional design method, a simple peripheral circuits, application to modify the characteristics of a flexible and easy to debug, hardware-software implementation of digital systems.
Keywords: VHDL; frequency meter; MAX+PLUSⅡ